Part No.: | LTM9004 |
Page: | 28 Pages |
Size: | 1671 KB |
Manufacturer: | Linear Technology |
Logo: | ![]() |
Views: | 1 |
Update Time: | 2024-12-26 14:15:37 |
DataSheet: | Download |
Part No. | Packing | SPQ | Marking | MSL | Pins | Temp Range | Package Description | Buy |
LTM9004CV-AA#PBF | Tray | 84 | LTM9004V AA | 3 | 204 | 0°C ~ 70°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004IV-AA#PBF | Tray | 84 | LTM9004V AA | 3 | 204 | -40°C ~ 85°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004CV-AB#PBF | Tray | 84 | LTM9004V AB | 3 | 204 | 0°C ~ 70°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004IV-AB#PBF | Tray | 84 | LTM9004V AB | 3 | 204 | -40°C ~ 85°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004CV-AC#PBF | Tray | 84 | LTM9004V AC | 3 | 204 | 0°C ~ 70°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004IV-AC#PBF | Tray | 84 | LTM9004V AC | 3 | 204 | -40°C ~ 85°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004CV-AD#PBF | Tray | 84 | LTM9004V AD | 3 | 204 | 0°C ~ 70°C | 204-Lead (15mm × 22mm × 2.91mm) LGA | |
LTM9004IV-AD#PBF | Tray | 84 | LTM9004V AD | 3 | 204 | -40°C ~ 85°C | 204-Lead (15mm × 22mm × 2.91mm) LGA |
The LTM9004 is a 14-bit direct conversion receiver subsystem. Utilizing an integrated system in a package (SiP) technology, the LTM9004 is a μModule® receiver that includes a dual high speed 14-bit A/D converter, lowpass filter, differential gain stages and a quadrature demodulator. Contact Analog Devices regarding customization.
The LTM9004 is perfect for zero-IF communications applications, with AC performance that includes 76dB SNR and 63.5dB spurious free dynamic range (SFDR). The entire chain is DC-coupled and provides access for DC offset adjustment. The integrated on-chip broadband transformers provide 50Ω single-ended interfaces at the RF and LO inputs.
A 5V supply powers the mixer and first amplifier for minimal distortion while a 3V supply allows low power ADC operation. A separate supply allows the outputs to drive 0.5V to 3.3V logic. An optional multiplexer allows both channels to share a digital output bus. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.