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LTC2299 Datasheet

LTC2299 Datasheet

Dual 14-Bit, 80Msps Low Power 3V ADC
Part No.: LTC2299
Page: 24 Pages
Size: 661 KB
Manufacturer: Linear Technology
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Views: 2
Update Time: 2023-11-21 11:03:15
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LTC2299 Datasheet Applicable Part

Part No. Packing SPQ Marking MSL Pins Temp Range Package Description Buy
LTC2299IUP#PBF Tube 40 LTC2299UP 1 64 -40°C ~ 85°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2299IUP#TRPBF Reel 2000 LTC2299UP 1 64 -40°C ~ 85°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2299IUP#TRMPBF Reel 500 LTC2299UP 1 64 -40°C ~ 85°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2299CUP#PBF Tube 40 LTC2299UP 1 64 0°C ~ 70°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2299CUP#TRPBF Reel 2000 LTC2299UP 1 64 0°C ~ 70°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2299CUP#TRMPBF Reel 500 LTC2299UP 1 64 0°C ~ 70°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

LTC2299 Datasheet(PDF)

LTC2299 Datasheet(Picture)

LTC2299 Features

  • Integrated Dual 14-Bit ADCs
  • Sample Rate: 80Msps
  • Single 3V Supply (2.7V to 3.4V)
  • Low Power: 444mW
  • 73dB SNR at 70MHz Input
  • 90dB SFDR at 70MHz Input
  • 110dB Channel Isolation at 100MHz
  • Multiplexed or Separate Data Bus
  • Flexible Input: 1VP-P to 2VP-P Range
  • 575MHz Full Power Bandwidth S/H
  • Clock Duty Cycle Stabilizer
  • Shutdown and Nap Modes
  • Pin Compatible Family
  • 64-Pin (9mm × 9mm) QFN Package

LTC2299 Applications

  • Wireless and Wired Broadband Communication
  • Imaging Systems
  • Spectral Analysis
  • Portable Instrumentation

LTC2299 Description

The LTC2299 is a 14-bit 80Msps, low power dual 3V A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2299 is perfect for demanding imaging and communications applications with AC performance that includes 73dB SNR and 90dB SFDR for signals well beyond the Nyquist frequency.

DC specs include ±1.2LSB INL (typ), ±0.5LSB DNL (typ) and ±5LSB INL, ±1LSB DNL  over temperature. The transition noise is a low 1.2LSBRMS.

A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic. An optional multiplexer allows both channels to share a digital output bus.

A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.

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