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LTC2288 Datasheet

LTC2288 Datasheet

Dual 10-Bit, 65Msps Low Noise 3V ADCs
Part No.: LTC2288
Page: 28 Pages
Size: 857 KB
Manufacturer: Linear Technology
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Views: 1
Update Time: 2023-11-23 10:12:13
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LTC2288 Datasheet Applicable Part

Part No. Packing SPQ Marking MSL Pins Temp Range Package Description Buy
LTC2288CUP#PBF Tube 40 LTC2288UP 1 64 0°C ~ 70°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2288CUP#TRPBF Reel 2000 LTC2288UP 1 64 0°C ~ 70°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2288CUP#TRMPBF Reel 500 LTC2288UP 1 64 0°C ~ 70°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2288IUP#PBF Tube 40 LTC2288UP 1 64 -40°C ~ 85°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2288IUP#TRPBF Reel 2000 LTC2288UP 1 64 -40°C ~ 85°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
LTC2288IUP#TRMPBF Reel 500 LTC2288UP 1 64 -40°C ~ 85°C 64-Lead QFN (9mm x 9mm x 0.75mm)  
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

LTC2288 Datasheet(PDF)

LTC2288 Datasheet(Picture)

LTC2288 Features

  • Integrated Dual 10-Bit ADCs
  • Sample Rate: 65Msps
  • Single 3V Supply (2.7V to 3.4V)
  • Low Power: 400mW/235mW/150mW
  • 61.8dB SNR
  • 85dB SFDR
  • 110dB Channel Isolation at 100MHz
  • Multiplexed or Separate Data Bus
  • Flexible Input: 1VP-P to 2VP-P Range
  • 575MHz Full Power Bandwidth S/H
  • Clock Duty Cycle Stabilizer
  • Shutdown and Nap Modes
  • Pin Compatible Family
  • 64-Pin (9mm × 9mm) QFN Package

LTC2288 Applications

  • Wireless and Wired Broadband Communication
  • Imaging Systems
  • Spectral Analysis
  • Portable Instrumentation

LTC2288 Description

The LTC2288 are 10-bit 65Msps, low noise dual 3V A/D converters designed for digitizing high frequency, wide dynamic range signals. The LTC2288 are perfect for demanding imaging and communications applications with AC performance that includes 61.8dB SNR and 85dB SFDR for signals at the Nyquist frequency.

DC specs include ±0.1LSB INL (typ), ±0.05LSB DNL (typ) and ±0.6 LSB INL, ±0.5 LSB DNL over temperature. The transition noise is a low 0.07LSBRMS.

A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic. An optional multiplexer allows both channels to share one digital output bus.

A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.

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