| Part No.： | LTC2217 |
| Page： | 32 Pages |
| Size： | 1277 KB |
| Manufacturer： | Linear Technology |
| Logo： |  |
| Views： | 1 |
| Update Time： | 2025-01-02 14:54:52 |
| DataSheet： | Download |
| Part No. | Packing | SPQ | Marking | MSL | Pins | Temp Range | Package Description | Buy |
| LTC2217CUP#PBF | Tube | 40 | LTC2217UP | 1 | 64 | 0°C ~ 70°C | 64-Lead (9mm × 9mm) Plastic QFN | |
| LTC2217CUP#TRPBF | Reel | 2000 | LTC2217UP | 1 | 64 | 0°C ~ 70°C | 64-Lead (9mm × 9mm) Plastic QFN | |
| LTC2217IUP#PBF | Tube | 40 | LTC2217UP | 1 | 64 | -40°C ~ 85°C | 64-Lead (9mm × 9mm) Plastic QFN | |
| LTC2217IUP#TRPBF | Reel | 2000 | LTC2217UP | 1 | 64 | -40°C ~ 85°C | 64-Lead (9mm × 9mm) Plastic QFN |
The LTC2217 is a 105Msps sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is fixed at 2.75VP-P.
The LTC2217 is perfect for demanding communications applications, with AC performance that includes 81.3dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specifications include ±3.5LSB INL, ±1LSB DNL (no missing codes).
The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.
The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.
