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LTC2206-14 Datasheet

LTC2206-14 Datasheet

14-Bit, 80Msps ADC
Part No.: LTC2206-14
Page: 34 Pages
Size: 1767 KB
Manufacturer: Linear Technology
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Views: 1
Update Time: 2023-11-14 15:41:59
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LTC2206-14 Datasheet Applicable Part

Part No. Packing SPQ Marking MSL Pins Temp Range Package Description Buy
LTC2206CUK-14#PBF Tube 52 LTC2206UK-14 1 48 0°C ~ 70°C 48-Lead (7mm × 7mm) Plastic QFN  
LTC2206CUK-14#TRPBF Reel 2000 LTC2206UK-14 1 48 0°C ~ 70°C 48-Lead (7mm × 7mm) Plastic QFN  
LTC2206CUK-14#TRMPBF Reel 500 LTC2206UK-14 1 48 0°C ~ 70°C 48-Lead (7mm × 7mm) Plastic QFN  
LTC2206IUK-14#PBF Tube 52 LTC2206UK-14 1 48 -40°C ~ 85°C 48-Lead (7mm × 7mm) Plastic QFN  
LTC2206IUK-14#TRPBF Reel 2000 LTC2206UK-14 1 48 -40°C ~ 85°C 48-Lead (7mm × 7mm) Plastic QFN  
LTC2206IUK-14#TRMPBF Reel 500 LTC2206UK-14 1 48 -40°C ~ 85°C 48-Lead (7mm × 7mm) Plastic QFN  
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

LTC2206-14 Datasheet(PDF)

LTC2206-14 Datasheet(Picture)

LTC2206-14 Features

  • Sample Rate: 80Msps
  • 77.3dBFS Noise Floor
  • 98dB SFDR
  • SFDR >82dB at 250MHz (1.5VP-P Input Range)
  • PGA Front End (2.25VP-P or 1.5VP-P Input Range)
  • 700MHz Full Power Bandwidth S/H
  • Optional Internal Dither
  • Optional Data Output Randomizer
  • Single 3.3V Supply
  • Power Dissipation: 947mW/762mW
  • Optional Clock Duty Cycle Stabilizer
  • Out-of-Range Indicator
  • Pin-Compatible Family
  • 48-Pin 7mm × 7mm QFN Package

LTC2206-14 Applications

  • Telecommunications
  • Receivers
  • Cellular Base Stations
  • Spectrum Analysis
  • Imaging Systems
  • ATE

LTC2206-14 Description

The LTC2206-14 are 80Msps, sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.

The LTC2206-14 are perfect for demanding communications applications, with AC performance that includes 77.3dB SNR and 98dB spurious free dynamic range (SFDR). Ultralow jitter of 80fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±1.5LSB INL, ±1LSB DNL (no missing codes) over temperature.

A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.

The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.

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