Part No.: | LTC2171-12 |
Page: | 34 Pages |
Size: | 1225 KB |
Manufacturer: | Linear Technology |
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Views: | 0 |
Update Time: | 2024-12-05 21:06:57 |
DataSheet: | Download |
Part No. | Packing | SPQ | Marking | MSL | Pins | Temp Range | Package Description | Buy |
LTC2171CUKG-12#PBF | Tube | 45 | LTC2171UKG-12 | 1 | 52 | 0°C ~ 70°C | 52-Lead (7mm × 8mm) Plastic QFN | |
LTC2171CUKG-12#TRPBF | Reel | 2000 | LTC2171UKG-12 | 1 | 52 | 0°C ~ 70°C | 52-Lead (7mm × 8mm) Plastic QFN | |
LTC2171IUKG-12#PBF | Tube | 45 | LTC2171UKG-12 | 1 | 52 | -40°C ~ 85°C | 52-Lead (7mm × 8mm) Plastic QFN | |
LTC2171IUKG-12#TRPBF | Reel | 2000 | LTC2171UKG-12 | 1 | 52 | -40°C ~ 85°C | 52-Lead (7mm × 8mm) Plastic QFN |
The LTC2171-12 are 4-channel, simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 71dB SNR and 90dB spurious free dynamic range (SFDR). An ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance.
DC specifications include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.
The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode) or one bit at a time (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity.
The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.