DataSheetAll » Manufacturer » Linear Technology » LTC2152-12 Datasheet
LTC2152-12 Datasheet

LTC2152-12 Datasheet

Single 12-Bit 250Msps ADCs
Part No.: LTC2152-12
Page: 30 Pages
Size: 679 KB
Manufacturer: Linear Technology
Logo:
Views: 0
Update Time: 2024-12-05 21:01:20
DataSheet: Download

LTC2152-12 Datasheet Applicable Part

Part No. Packing SPQ Marking MSL Pins Temp Range Package Description Buy
LTC2152CUJ-12#PBF Tube 61 LTC2152UJ-12 1 40 0°C ~ 70°C 40-Lead (6mm × 6mm) Plastic QFN  
LTC2152CUJ-12#TRPBF Reel 2000 LTC2152UJ-12 1 40 0°C ~ 70°C 40-Lead (6mm × 6mm) Plastic QFN  
LTC2152IUJ-12#PBF Tube 61 LTC2152UJ-12 1 40 -40°C ~ 85°C 40-Lead (6mm × 6mm) Plastic QFN  
LTC2152IUJ-12#TRPBF Reel 2000 LTC2152UJ-12 1 40 -40°C ~ 85°C 40-Lead (6mm × 6mm) Plastic QFN  
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

LTC2152-12 Datasheet(PDF)

LTC2152-12 Datasheet(Picture)

LTC2152-12 Features

  • 68.5dB SNR
  • 90dB SFDR
  • Low Power: 347mW/333mW/306mW Total
  • Single 1.8V Supply
  • DDR LVDS Outputs
  • Easy-to-Drive 1.5VP-P Input Range
  • 1.25GHz Full Power Bandwidth S/H
  • Optional Clock Duty Cycle Stabilizer
  • Low Power Sleep and Nap Modes
  • Serial SPI Port for Configuration
  • Pin-Compatible 14-Bit Versions
  • 40-Lead (6mm × 6mm) QFN Package

LTC2152-12 Applications

  • Communications
  • Cellular Basestations
  • Software Defined Radios
  • Medical Imaging
  • High Definition Video
  • Testing and Measurement Instruments

LTC2152-12 Description

The LTC2152-12 are a family of 250Msps 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 68.5dB SNR and 90dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to undersample high input frequencies with good performance. The latency is only five clock cycles.

DC specs include ±0.26LSB INL (typ), ±0.16LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.54LSBRMS.

The digital outputs are double-data rate (DDR) LVDS.

The ENC+ and ENC inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.

LTC2152-12 Datasheet Related Parts

About DataSheetAll|Contact Us|Privacy Policy|Manufacturer List|Sitemap|XML|TXT
CopyRight © 2024 DataSheetAll(datasheetall.com)