Part No.: | LTC2144-14 |
Page: | 38 Pages |
Size: | 647 KB |
Manufacturer: | Linear Technology |
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Views: | 0 |
Update Time: | 2024-12-21 09:54:42 |
DataSheet: | Download |
Part No. | Packing | SPQ | Marking | MSL | Pins | Temp Range | Package Description | Buy |
LTC2144CUP-14#PBF | Tube | 40 | LTC2144UP-14 | 1 | 64 | 0°C ~ 70°C | 64-Lead QFN (9mm x 9mm x 0.75mm) | |
LTC2144CUP-14#TRPBF | Reel | 2000 | LTC2144UP-14 | 1 | 64 | 0°C ~ 70°C | 64-Lead QFN (9mm x 9mm x 0.75mm) | |
LTC2144IUP-14#PBF | Tube | 40 | LTC2144UP-14 | 1 | 64 | -40°C ~ 85°C | 64-Lead QFN (9mm x 9mm x 0.75mm) | |
LTC2144IUP-14#TRPBF | Reel | 2000 | LTC2144UP-14 | 1 | 64 | -40°C ~ 85°C | 64-Lead QFN (9mm x 9mm x 0.75mm) |
The LTC2144-14 are 2-channel simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.1dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.08psRMS allows undersampling of IF frequencies with excellent noise performance.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is 1.2LSBRMS.
The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.
The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.