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ADF4111 Datasheet

ADF4111 Datasheet

Single, Integer-N, 1.2 GHz PLL With Programmable Prescaler And Charge Pump
Part No.: ADF4111
Page: 28 Pages
Size: 388 KB
Manufacturer: Analog Devices, Inc.
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Views: 1
Update Time: 2025-01-12 20:34:08
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ADF4111 Datasheet Applicable Part

Part No. Packing SPQ Marking MSL Pins Temp Range Package Description Buy
ADF4111BCPZ Tray 165 ADF4111BCPZ 3 20 -40°C ~ 85°C 20-Lead Frame Chip Scale Package  
ADF4111BCPZ-RL Reel 5000 ADF4111BCPZ 3 20 -40°C ~ 85°C 20-Lead Frame Chip Scale Package  
ADF4111BCPZ-RL7 Reel 1500 ADF4111BCPZ 3 20 -40°C ~ 85°C 20-Lead Frame Chip Scale Package  
ADF4111BRU Tube 96 ADF4111BRU 1 16 -40°C ~ 85°C 16-Lead TSSOP  
ADF4111BRUZ Tube 96 ADF4111B 1 16 -40°C ~ 85°C 16-Lead TSSOP  
ADF4111BRUZ-RL Reel 2500 ADF4111B 1 16 -40°C ~ 85°C 16-Lead TSSOP  
ADF4111BRUZ-RL7 Reel 1000 ADF4111B 1 16 -40°C ~ 85°C 16-Lead TSSOP  
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

ADF4111 Datasheet(PDF)

ADF4111 Datasheet(Picture)

ADF4111 Features

  • ADF4111: 1.2 GHz
  • +2.7 V to +5.5 V Power Supply
  • Separate Vp Allows Extended Tuning Voltage in 3V Systems
  • Programmable Charge Pump Currents
  • Programmable Dual Modulus Prescaler 8/9, 16/17, 32/33, 64/65
  • Programmable Anti-Backlash Pulse Width
  • 3-Wire Serial Interface
  • Digital Lock Detect
  • Power Down Mode

ADF4111 Applications

  • Base stations for wireless radio (GSM,PCS,DCS,CDMA,WCDMA)
  • Wireless handsets (GSM,PCS,DCS,CDMA,WCDMA)
  • Wireless LANS
  • Communications test equipment
  • CATV equipment

ADF4111 Description

The ADF4111 family of frequency synthesizers can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. They consist of low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual modulus prescaler (P/P+1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N = BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).

Control of all the on-chip registers is via a simple 3-wire interface. The devices operate with a power supply ranging from 2.7 V to 5.5 V and can be powered down when not in use.

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