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ADF4106-EP Datasheet

ADF4106-EP Datasheet

PLL Frequency Synthesizer
Part No.: ADF4106-EP
Page: 10 Pages
Size: 294 KB
Manufacturer: Analog Devices, Inc.
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Views: 1
Update Time: 2025-01-12 20:45:19
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ADF4106-EP Datasheet Applicable Part

Part No. Packing SPQ Marking MSL Pins Temp Range Package Description Buy
ADF4106SRU-EP Tube 96   1 16 -55°C ~ 125°C 16-Lead TSSOP  
ADF4106SRU-EP-R7 Reel 1000   1 16 -55°C ~ 125°C 16-Lead TSSOP  
ADF4106SRUZ-EP Tube 96   1 16 -55°C ~ 125°C 16-Lead TSSOP  
ADF4106SRUZ-EP-R7 Reel 1000   1 16 -55°C ~ 125°C 16-Lead TSSOP  
ADF4106SCPZ-EP Tray 63 ADF4106EP 3 20 -55°C ~ 125°C 20-Lead LFCSP (4mm x 4mm)  
ADF4106SCPZ-EP-R7 Reel 1500 ADF4106EP 3 20 -55°C ~ 125°C 20-Lead LFCSP (4mm x 4mm)  
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

ADF4106-EP Datasheet(PDF)

ADF4106-EP Datasheet(Picture)

ADF4106-EP Features

  • 6.0 GHz bandwidth
  • 2.7 V to 3.3 V power supply
  • Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems
  • Programmable dual-modulus prescaler 8/9, 16/17, 32/33, 64/65
  • Programmable charge pump currents
  • Programmable antibacklash pulse width
  • 3-wire serial interface
  • Analog and digital lock detect
  • Hardware and software power-down mode
  • Support defense and aerospace applications (AQEC)
  • Military temperature range (−55°C to +125°C)
  • Controlled manufacturing baseline
  • One assembly/test site
  • One fabrication site
  • Enhanced product change notification
  • Qualification data available upon request

ADF4106-EP Applications

  • Broadband wireless access
  • Satellite systems
  • Instrumentation
  • Wireless LANS
  • Base stations for wireless radios

ADF4106-EP Description

The ADF4106-EP frequency synthesizer can be used to implement local oscillators in the up-conversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD),a precision charge pump, a programmable reference divider,programmable A counter and B counter, and a dual-modulusprescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loopfilter and voltage controlled oscillator (VCO). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.

Additional application and technical information can be foundin the ADF4106 data sheet.

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