AD6402 Datasheet

The AD6402 is a complete transceiver subsystem for use in high bit rate radio systems employing FM or FSK modulation.It is optimized for use in time domain multiple access (TDMA) systems with communications rates of approximately 1 MBPS.The AD6402 integrates key functions, including VCOs and a low drop-out voltage regulator. The AD6402 operates directly from an unregulated battery supply of 3.1 V to 4.5 V and provides a regulated voltage output which can be used for VCO supply regulation on a companion RF chip such as the AD6401.

The AD6402 transceiver consists of a mixer, integrated IF bandpass filter, IF limiter with RSSI detection, VCO, PLL demodulator and a low dropout voltage regulator. On receive, it downconverts an IF signal in the 110 MHz range to a second IF frequency, this frequency being determined by the demodulator reference divide ratios. It then filters, amplifies, and demodulates this signal. The AD6402 provides a filtered baseband data output. On transmit, it accepts a Gaussian Frequency Shift Keying (GFSK) baseband signal, low-pass filters the signal if required using the on-chip op amp and modulates the IF VCO by varying the bias voltage on an off-chip varactor diode used in the tank circuit.

The AD6402 has multiple power-down modes to maximize battery life. It operates over a temperature range of –25°C to +85°C and is packaged in a JEDEC standard 28-lead small shrink outline (SSOP) surface-mount package.